Allegro DVT contributes to European automotive chip

BMW and Bosch backing open chiplet standard signal Europe’s desire to reduce automotive chips’ dependence on single suppliers Allegro DVT has contributed video encoding and semiconductor intellectual property decoding (IP) to the Automotive Base Die chiplet of the CHASSIS programme, a 5nm integration hub designed to enable a standardized, open chiplet ecosystem for software-defined vehicles (SDVs). Automotive Base Die is co-financed by BMW, imec and Bosch through the European Chips Joint Undertaking (Chips JU). Allegro DVT’s IP supports multi-resolution video lines for advanced driver assistance system (ADAS) cameras, surround view and infotainment applications within the chiplet-based architecture. The solution is designed to meet memory bandwidth, processing latency and power consumption requirements across heterogeneous chip configurations connected via the Universal Chiplet Interconnect Express (UCIe) standard. Nouar Hamze, Chief Executive Officer of Allegro DVT, said in a statement: “We are incredibly proud to be a key partner of the CHASSIS program and to contribute to such a transformative project for the European automotive industry. Our Video Encoding and Decoding Semiconductor IP solutions align perfectly with the goals of the Automotive Base Die chiplet, enabling high-performance video processing for next-generation automotive platforms. This collaboration underlines our commitment to advancing innovation and creating open standards for software-defined vehicles.” CHASSIS is a three-year European research project coordinated by Bosch and funded through Chips JU under grant agreement No. 101252788. The program aims to create an open chiplet platform to strengthen European semiconductor competitiveness in automotive applications.

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